Silicon Applications Engineer Intern's Full Profile
Internship Description: Position is responsible for the circuit and logic design of FPGA elements Circuit and logic design for advanced 65 & 45 nm Copper/Low-K CMOS FPGAs using transistor-level, gate-level and Verilog/Synopsys design methodologies Simulation of designs using HSPICE, Nanosim, and/or Verilog Schematic entry and layout verification via Cadence Opus tools Layout supervision and floor planning of large blocks...
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